The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

May. 05, 2022
Applicant:

Dpix, Llc, Colorado Springs, CO (US);

Inventors:

Jinhui Cho, Colorado Springs, CO (US);

Jerome David Crocco, Colorado Springs, CO (US);

Sanjeev Tandon, Colorado Springs, CO (US);

Assignee:

DPIX, LLC, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01); H10F 39/12 (2025.01);
U.S. Cl.
CPC ...
H10F 39/80373 (2025.01); H10F 39/802 (2025.01); H10F 39/80377 (2025.01); H10F 39/8057 (2025.01);
Abstract

The phenomenon of charge trapping and its impact on noise performance of an imaging array using thin film transistor switches can be ameliorated by compensation techniques. One such compensation technique is a recovery process by which trapped charges are detrapped through the periodic imposition of thermal, optical, and/or bias energy. Another technique involves a shield line overlying the transistor switches and connected to the gate base to reduce the gate base resistance and hence reduce changes in the RC time constant of the gate bus.


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