The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Jan. 23, 2025
Applicant:

Auradine, Inc., Santa Clara, CA (US);

Inventors:

Shahriar Ilislamoo, San Jose, CA (US);

David Carlson, Haslet, TX (US);

Barun Kar, Saratoga, CA (US);

Darshan Shah, Milpitas, CA (US);

Assignee:

Auradine, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/23 (2006.01); G06F 7/57 (2006.01); H03K 19/08 (2006.01);
U.S. Cl.
CPC ...
H03K 19/23 (2013.01); G06F 7/57 (2013.01); H03K 19/08 (2013.01);
Abstract

An electronic circuit includes: an event detector logic circuit; a computing device; and a plurality of integrated circuit (IC) chips that are electrically connected in parallel between at least one control bus configured to provide input signals and the event detector logic circuit. The event detector logic circuit is configured to: receive a plurality of output signals from the plurality of IC chips, generate a data output signal that includes data obtained from a first output signal of the plurality of output signals, and transmit the data output signal to the computing device.


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