The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2025
Filed:
Mar. 01, 2022
Applicant:
Kioxia Corporation, Tokyo, JP;
Inventor:
Eiji Takano, Nagoya Aichi, JP;
Assignee:
Kioxia Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/469 (2006.01); H01L 21/463 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 21/469 (2013.01); H01L 21/463 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 21/6836 (2013.01); H01L 23/3128 (2013.01); H01L 25/0657 (2013.01); H01L 2221/68331 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68359 (2013.01); H01L 2221/68363 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06565 (2013.01);
Abstract
According to one embodiment, a method for manufacturing a semiconductor device includes placing a semiconductor chip on a first surface of a support substrate, forming a first resin layer covering the semiconductor chip on the first surface, and forming a second resin layer on a second surface of the support substrate. The second surface is opposite the first surface. In some examples, the second resin layer can be formed to counteract or mitigate warpage of the support substrate that might otherwise result from use of the first resin layer.