The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Dec. 29, 2022
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Paul Blinzer, Bellevue, WA (US);

David Livingstain Ziman, Austin, TX (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0862 (2016.01); G06T 1/20 (2006.01); G06T 11/00 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0611 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 12/0862 (2013.01); G06T 1/20 (2013.01); G06T 11/001 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/602 (2013.01); G06T 2210/36 (2013.01);
Abstract

An apparatus includes a co-processor that provides process operations for a first processor, such as a host processor, that executes one or more applications. The co-processor issues a data load request to a request command queue controlled by a non-volatile memory system, that loads a subset of prestored data from a prestored set of data, such as file data of an application, that is stored in a cache buffer in the non-volatile memory system or system memory, for an operation performed by the co-processor. The co-processor uses the loaded subset of prestored data for the operation. In certain implementations, the co-processor issues the data load request as a direct memory access (DMA) load request for the cache buffer. The prestored set of data includes a prestored set of data from a file storage system. Associated methods are also disclosed.


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