The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2025

Filed:

Jun. 01, 2023
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Giorgio Carluccio, Eindhoven, NL;

Björn Christian Brands, Rellingen, DE;

Henrik Asendorf, Hamburg, DE;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2896 (2013.01); G01R 31/2886 (2013.01);
Abstract

A two-stage test process for testing IC packages having integrated launchers includes a first stage in which an RF-accurate test process is used to perform RF-accurate tests on a sample set of IC packages to obtain RF-accurate test results and a loop-back test process is performed to obtain loop-back test results. Test characterization data is obtained by comparing the RF-accurate test results to the loop-back test results. In a second stage, larger-scale testing is performed solely with the loop-back test process, and the loop-back test results for each tested IC package are compared with the test characterization data to characterize the test operation of the tested IC package. The loop-back test process can employ a test jig employing a PCB-mounted or PCB-integrated loop-back structure for relatively rapid test setup and test processing.


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