The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Nov. 17, 2023
Cypress Semiconductor Corporation, San Jose, CA (US);
Saleh Karman, Villach, AT;
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
A digital phase-locked loop includes a first clock divider, a decimation filter, a proportional integral filter, a signal conditioner, and a digitally controlled oscillator. The first clock divider divides a first clock signal including a first clock rate to generate a second clock signal including a second clock rate less than the first clock rate. The decimation filter converts an input signal at the first clock rate to an output signal at the second clock rate. The proportional integral filter filters the output signal at the second clock rate to generate a filtered output signal. The signal conditioner conditions the filtered output signal at the second clock rate to generate a conditioned output signal. The digitally controlled oscillator generates a carrier clock signal in response to the conditioned output signal.