The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2025
Filed:
Jan. 29, 2024
Silicon Mitus, Inc., Seongnam-Si, KR;
Hangzhou Silicon-magic Semiconductor Technology Co., Ltd, Hangzhou, CN;
SILICON MITUS, INC., Seongnam-Si, KR;
Hangzhou Silicon-Magic Semiconductor Technology Co., Ltd, Hangzhou, CN;
Abstract
A phase locked loop includes a main voltage-controlled oscillator for which an oscillation frequency is adjusted by an offset current and a control voltage (Vctrl), the offset current being set by an offset current setting code (VCO_CON), a phase frequency detector configured to adjust the control voltage by comparing an output signal (mCLK) of the main voltage-controlled oscillator and an input data signal (Data), and an offset current setter configured to generate the offset current setting code for setting the offset current of the main voltage-controlled oscillator. The offset current setter includes n sample voltage-controlled oscillators configured to generate n signals with different frequencies, respectively, and n counters configured to compare frequencies of each of the signals (sCLK) output from the n sample voltage-controlled oscillators and the input data signal, and is configured to generate the offset current setting code based on a comparison result of the n counters.