The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Mar. 02, 2022
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Mitsushi Tabata, Kanagawa, JP;

Takashi Masuda, Kanagawa, JP;

Daisuke Suzuki, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/133 (2014.01); G01S 7/4915 (2020.01); H03K 5/156 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/133 (2013.01); G01S 7/4915 (2013.01); H03K 5/1565 (2013.01); H03K 2005/00071 (2013.01);
Abstract

A delay adjustment circuit according to an embodiment includes: a plurality of delay adjustment units connected in series, each of the plurality of delay adjustment units including one or more first delay elements () connected in series that delay an input signal on the basis of a clock, and a first selector () that outputs one of the input signal and an output of the first delay element at a last stage among the one or more first delay elements; and an output unit () that outputs a clock according to an output of the first selector included in a delay adjustment unit at a last stage among the plurality of delay adjustment units, in which each of the plurality of delay adjustment units includes a different number of the first delay elements.


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