The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Mar. 10, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyun Seok Nam, Suwon-si, KR;

Jin Gyu Kang, Suwon-si, KR;

Jeong Woon Kong, Suwon-si, KR;

Yong Seong Roh, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/133 (2014.01); H03K 5/00 (2006.01); H03K 5/135 (2006.01);
U.S. Cl.
CPC ...
H03K 5/133 (2013.01); H03K 5/00006 (2013.01); H03K 5/135 (2013.01); H03K 2005/00065 (2013.01);
Abstract

A power management integrated circuit including: a clock generator that generates an input clock; a first phase delay controller that delays the input clock by a first phase and outputs a first supply clock to a first switching converter; a second phase delay controller that delays the input clock by a second phase and outputs a second supply clock to a second switching converter; and a third phase delay controller that delays the input clock by a third phase and outputs a third supply clock to a third switching converter, wherein the first phase, the second phase and the third phase have different phases from each other.


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