The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Feb. 24, 2023
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Chien-Tsu Yeh, Hsinchu, TW;

Hsi-En Liu, Hsinchu, TW;

Yi-Chun Hsieh, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/14 (2006.01); H03K 5/00 (2006.01); H03K 5/01 (2006.01);
U.S. Cl.
CPC ...
H03K 17/14 (2013.01); H03K 5/01 (2013.01); H03K 2005/00286 (2013.01);
Abstract

The present disclosure provides a signal converting circuit including a phase interpolator circuit and a bias voltage generation circuit. The phase interpolator circuit is configured to convert multiple input clock signals into an output clock signal according to a digital signal. The bias voltage generation circuit is electrically coupled to the phase interpolator circuit, is configured to generate a bias voltage according to reference information and is configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of multiple bit configurations of the digital signal. The reference information is relevant to a change of the phase interpolator circuit due to a manufacture process variation.


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