The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Oct. 10, 2019
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventor:

Dai Ikarashi, Musashino, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06F 5/01 (2006.01); H04L 9/08 (2006.01);
U.S. Cl.
CPC ...
G06F 7/544 (2013.01); G06F 5/01 (2013.01); H04L 9/085 (2013.01);
Abstract

The present invention implements high-speed right shift computation and division in secure computation. According to the present invention, a public value multiplication part calculates [a']=[2a] from a distributed value [a] of a value 'a.' A first conversion part converts [a′] into additive secret sharing. A right shift computation part calculates <s>=<a′>>>b+u. A second conversion part converts <s> into linear secret sharing. A first bit conversion part converts lower u bits of <a′>into {a′mod 2}. A quotient transfer partobtains lower u bits of −Σ{a′mod 2} as {q}. A second bit conversion part converts lower b+u bits of <a′>into {a′}={a′mod 2}. An addition part calculates {z}=Σ{a′}+{q}, and obtains a bit sequence {z} of a (b+u)-th bit and after of {z}. A third conversion part converts {q} and {z} into linear secret sharing. An output computation part outputs [s]−[q]+[z] as [a>>b].


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