The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Nov. 03, 2024
Applicant:

Next Silicon Ltd., Givatayim, IL;

Inventors:

Elad Raz, Ramat Gan, IL;

Ilan Tayati, Tzur Hadassa, IL;

Ronen Gal, Ramat Gan, IL;

Oded Margalit, Ramat Gan, IL;

Elad Shliselberg, Ramat Gan, IL;

Assignee:

NEXT SILICON LTD., Givatayim, IL;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/34 (2020.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 30/34 (2020.01); G06F 9/30101 (2013.01);
Abstract

An Integrated Circuit (IC) device, and a method of utilizing thereof, may include: a plurality of Processing Elements (PEs), each comprising one or more configurable hardware logic blocks. The IC may further include a plurality of configuration memory elements, each associated with a respective PE, and adapted to maintain two or more configuration settings of the respective PE. The IC may further include a configuration manager circuit, configured to: receive a reconfiguration instruction, dictating a required function of the IC device; based on the reconfiguration instruction, identify at least one target PE of the plurality of PEs as a target for reconfiguration; based on the required function, select a specific configuration setting in the configuration memory element associated with the at least one target PE; and reconfigure at least one hardware logic block of the at least one target PE, according to the selected configuration setting.


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