Low power optimization based upon host exit latency

Abstract

There is a tradeoff between the amount of power consumption decreased and the latency needed to return a data storage device back to an operational power mode. When the data storage device receives a wake up indication from a host device, a controller of the data storage device initiates a counter in order to determine a host exit latency. Based on the host exit latency, the controller determines a group of low power state entrance actions from a plurality of groups to perform during a next entrance into a firmware active idle state based on an associated completion wake up time and the host exit latency. The controller selects the group whose completion wake up time is closest to the host exit latency and less than or equal to the host exit latency. The controller performs the selected groups low power state entrance actions during a next entrance into the firmware active idle state.