The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Dec. 12, 2022
Applicant:

Faraday Technology Corp., Hsin-Chu, TW;

Inventors:

Sivaramakrishnan Subramanian, Karnataka, IN;

Hussainvali Shaik, Karnataka, IN;

Eswar Reddi, Karnataka, IN;

Assignee:

Faraday Technology Corp., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/565 (2006.01); G05F 1/575 (2006.01);
U.S. Cl.
CPC ...
G05F 1/565 (2013.01); G05F 1/575 (2013.01);
Abstract

A voltage regulator provides a regulated voltage to a double data rate (DDR) Physical Interface (PHY) including a plurality of delay elements. The voltage regulator includes: an amplifier, for receiving a voltage at a first input terminal and generating an output voltage; a first MOSFET coupled to a supply voltage and a second input terminal of the amplifier; a second MOSFET coupled in parallel with the first MOSFET for generating a first current in response to a first enable signal; a load, coupled to the first MOSFET and the second MOSFET, for generating the regulated voltage; and a load capacitor, coupled in parallel with the load. The first enable signal is generated by inputting a gate enable signal for a delay element of the plurality of delay elements into a delay circuit corresponding to the delay element.


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