The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Jun. 08, 2021
Applicant:

Acconeer Ab, Malmö, SE;

Inventors:

Ehsan Foroozanfard, Malmö, SE;

Mikael Egard, Malmö, SE;

Assignee:

Acconeer AB, Malmö, SE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01S 7/03 (2006.01); G01S 7/02 (2006.01); G01S 7/06 (2006.01); G01S 13/88 (2006.01); H01Q 1/24 (2006.01); H01Q 1/38 (2006.01); H01Q 15/08 (2006.01);
U.S. Cl.
CPC ...
G01S 7/032 (2013.01); G01S 7/028 (2021.05); G01S 7/06 (2013.01); H01Q 1/24 (2013.01); H01Q 1/38 (2013.01); H01Q 15/08 (2013.01); G01S 13/88 (2013.01);
Abstract

A radar device comprising: a printed circuit board (), PCB, comprising a ground plane (), a radar sensor chip package () mounted on the PCB () and comprising a mm Wave radio frequency, RF, integrated circuit () and a planar antenna structure () configured as an antenna-in-package and oriented in a plane parallel to the ground plane (), wherein the mmWave RF integrated circuit () is configured to output a mmWave signal () to be transmitted by the planar antenna structure (), and a cavity (), wherein the radar sensor chip package () is arranged in the cavity (), the cavity () having an open side (), and the cavity () being defined by a conductive rear wall surface () opposite the open side (), a pair of mutually opposite and conductive sidewall surfaces (), a conductive top surface (), and a conductive bottom surface (), wherein at least a portion of the conductive bottom surface () is formed by at least a portion of the ground plane () of the PCB (), and wherein the sidewall surfaces, the top surface, and the bottom surfaces () each extends from the rear wall surface () towards the open side () of the cavity ().


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