The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Nov. 10, 2023
Applicant:

Mediatek Singapore Pte. Ltd., Singapore, SG;

Inventors:

Ashish Kumar Nayak, San Jose, CA (US);

Hugh Thomas Mair, San Jose, CA (US);

Anshul Varma, San Jose, CA (US);

Anand Rajagopalan, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3193 (2006.01); G01R 31/28 (2006.01); G01R 31/30 (2006.01); G01R 31/317 (2006.01); H03K 3/03 (2006.01); H03K 5/134 (2014.01);
U.S. Cl.
CPC ...
G01R 31/31725 (2013.01); G01R 31/2882 (2013.01); G01R 31/3016 (2013.01); G01R 31/31937 (2013.01); H03K 3/0315 (2013.01); H03K 5/134 (2014.07);
Abstract

An integrated circuit includes a programmable delay path comprising a plurality of path delay tuners configured to receive a plurality of control signals and add to the programmable delay path an amount of cell delay and an amount of wire delay that are based on the plurality of control signals. The integrated circuit further includes a controller configured to provide the plurality of control signals to the programmable delay path, receive a signal from the programmable delay path, and compare the signal to a reference signal.


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