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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12328877 B1

PDFFull Text
Date of Patent:
Jun. 10, 2025

Filed:

Aug. 09, 2023

Vertical semiconductor device and method for fabricating the vertical semiconductor device

Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

In-Su Park, Icheon-si, KR;

Jong-Gi Kim, Yongin-si, KR;

Hai-Won Kim, Icheon-si, KR;

Hoe-Min Jeong, Seoul, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:

WILLIAM PARK & ASSOCIATES LTD.

Primary Examiner:

Jesse Y Miyoshi

Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01); H10B 41/27 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 21/28525 (2013.01); H01L 21/76805 (2013.01); H01L 21/76823 (2013.01); H01L 21/76834 (2013.01); H01L 21/76895 (2013.01); H01L 23/53271 (2013.01); H01L 23/535 (2013.01); H10B 41/27 (2023.02);
Abstract

A vertical semiconductor device includes: a lower structure; a multi-layer stack structure including a source layer formed over the lower structure and gate electrodes formed over the source layer; a vertical structure penetrating the multi-layer stack structure and including a channel layer insulated from the source layer; a vertical source line spaced apart from the vertical structure to penetrate the multi-layer stack structure and contacting the source layer; and a horizontal source channel contact suitable for coupling the source layer and the channel layer and including a first conductive layer and a second conductive layer that include different dopants.

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