The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2025

Filed:

Jul. 22, 2022
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Jhen-Yu Tsai, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/764 (2006.01); H01L 21/768 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/34 (2023.02); H01L 21/02362 (2013.01); H01L 21/764 (2013.01); H01L 21/7682 (2013.01); H01L 21/76829 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 21/76834 (2013.01); H01L 21/76835 (2013.01); H10B 12/053 (2023.02); H10B 12/488 (2023.02); H01L 2221/1042 (2013.01); H01L 2221/1047 (2013.01); H01L 2221/1057 (2013.01); H10B 12/482 (2023.02); H10B 12/485 (2023.02);
Abstract

A memory structure is described, which includes a substrate, a word line structure, a bit line contact, and a bit line. The substrate has a trench. The word line structure is disposed in the trench of the substrate. The word line structure includes a word line, a gate dielectric layer, and a capping layer. The word line is disposed in the trench. The gate dielectric layer is disposed between the word line and the substrate. The capping layer covers the word line. The capping layer includes a first material film, and a dielectric constant of the first material layer is smaller than a dielectric constant of silicon nitride. The bit line contact is disposed on a portion of the trench and a portion of the capping layer. The bit line is disposed over the bit line contact and electrically connected to the bit line contact.


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