The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2025

Filed:

Apr. 16, 2023
Applicant:

Faraday Technology Corp., Hsin-Chu, TW;

Inventors:

Chen-Hui Xu, Suzhou, CN;

Xiao-Dong Fei, Suzhou, CN;

Wen-Chi Huang, Hsin-Chu, TW;

Hui-Wen Hu, Suzhou, CN;

Assignee:

Faraday Technology Corp., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/56 (2006.01); G05F 1/575 (2006.01); H02M 3/155 (2006.01);
U.S. Cl.
CPC ...
H02M 3/155 (2013.01);
Abstract

The present invention discloses a regulator. The regulator includes a bias voltage generating circuit and a flipped voltage follower (FVF), wherein the bias voltage generating circuit is configured to generate a bias voltage, and the FVF is configured to generate an output voltage according to the bias voltage and a supply voltage. The FVF includes a first P-type transistor and a first N-type transistor. The P-type transistor is configured to receive the bias voltage via a gate electrode of the P-type transistor, to generate the output voltage on a source electrode of the P-type transistor. A drain electrode of the first N-type transistor is connected to the supply voltage, a source electrode of the first N-type transistor is connected to the source electrode of the first P-type transistor, and a gate electrode of the first N-type transistor receives a driving signal for compensating the output voltage.


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