Manufacturing method of integrated structure of semiconductor devices having split gate

Abstract

A manufacturing method of an integrated structure of semiconductor devices having split gates includes: forming a first silicon nitride layer covering a low voltage device and a high voltage device; etching back the first silicon nitride layer by an etching process step to form a residue silicon nitride region between two adjacent low voltage gates; forming a silicon oxide layer, a second silicon nitride layer, and a metal layer; forming two split gates by an etching process step; forming a contact etch stop layer (CESL); etching the CESL by an etching process step to form plural contacts in the CESL, wherein the contact between the two adjacent low voltage gates exposes at least part of a top surface of a common low voltage source on a substrate; and forming plural conductive plugs in the plural contacts respectively, wherein each of the conductive plug fills up the corresponding contact.