logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12324150 B1

PDFFull Text
Date of Patent:
Jun. 03, 2025

Filed:

Apr. 22, 2022

Method of making a multi-tier memory device with rounded joint structures

Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Tsutomu Imai, Yokkaichi, JP;

Nao Nagase, Yokkaichi, JP;

Chiko Kudo, Yokkaichi, JP;

Sadao Fukuno, Yokkaichi, JP;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:

THE MARBURY LAW GROUP PLLC

Primary Examiner:

Yara B Green

Assistant Examiner:

Christopher M Roland

Int. Cl.
CPC ...
H10B 41/27 (2023.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/35 (2023.01); H10B 41/50 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/50 (2023.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/35 (2023.02); H10B 41/50 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/50 (2023.02);
Abstract

A sacrificial memory opening fill structure for a multi-tier memory device may include a semiconductor fill material portion a metallic fill material portion to enhance control of a vertical cross-sectional profile of an inter-tier memory opening. Multiple inter-tier dielectric layers may be employed to reduce sharp corners in a memory opening fill structure. Alternatively or additionally, a combination of an isotropic etch process followed by an anisotropic etch process may be used to form a first-tier memory opening.

Find Patent Forward Citations

Imai, Tsutomu. (2025). Method of making a multi-tier memory device with rounded joint structures (U.S. Patent No. 12324150). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12324150

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…