The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Aug. 22, 2022
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Hubert Martin Bode, Haar, DE;

Alexander Hoefler, Austin, TX (US);

Glenn Charles Abeln, Buda, TX (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 5/14 (2006.01); G11C 7/14 (2006.01); H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1087 (2013.01); G11C 5/14 (2013.01); G11C 7/14 (2013.01); H03K 19/09421 (2013.01);
Abstract

A memory includes a supply voltage generation circuit for providing a supply voltage to a plurality of SRAM cells of the memory during at least one mode of memory operation. The supply voltage generation circuit includes a first reference generation circuit that includes at least one SRAM cell with a replica SRAM latch. The first reference generation circuit provides a first voltage during an at least one mode of memory operation. The supply voltage generation circuit includes a second reference generation circuit that includes at least one SRAM cell with a replica SRAM latch. The second reference generation circuit provides a second voltage during the at least one mode of memory operation. The voltage generation circuit includes an output for providing a supply voltage to the plurality of cells during the at least one mode of memory operation.


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