The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Mar. 24, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Kwangsook Noh, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/408 (2006.01); G11C 11/4093 (2006.01); G11C 11/4096 (2006.01); G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G11C 11/4087 (2013.01); G11C 11/4093 (2013.01); G11C 11/005 (2013.01); G11C 11/408 (2013.01);
Abstract

A memory chip includes a plurality of storage blocks respectively including a plurality of memory cells; and a logic circuit configured to control the plurality of storage blocks, wherein the logic circuit includes an input/output pad configured to input data to the plurality of storage blocks and output data to the plurality of storage blocks; wherein the logic circuit is further configured to allocate block address codes having a bit inversion relationship with each other, output a mode selection signal in response to external control, output an external address code in response to the mode selection signal indicating a first addressing mode, and output an address code having a bit inversion relationship with regard to the external address code in response to the mode selection signal indicating a second addressing mode, and select a storage block to be controlled by the access command from among the plurality of storage blocks.


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