The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2025
Filed:
Mar. 06, 2023
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Won Ha Choi, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/4093 (2006.01); H01L 23/00 (2006.01); H01L 23/49 (2006.01); H01L 23/522 (2006.01); H01L 25/16 (2023.01);
U.S. Cl.
CPC ...
G11C 11/4093 (2013.01); H01L 23/49 (2013.01); H01L 23/5226 (2013.01); H01L 24/14 (2013.01); H01L 25/16 (2013.01); H01L 2224/145 (2013.01); H01L 2924/1436 (2013.01);
Abstract
A single memory package includes a package substrate; at least one of a memory chip and a buffer chip mounted on the package substrate; M×N number of interface data channel buses between the memory chip and the buffer chip; and (M×N)/2number of outer data channel buses connected to the buffer chip. The buffer chip receives data from the memory chip through the interface data channel buses, and provides the data through the outer data channel buses. The M, N, and n are natural numbers.
Choi, Won. (2025). Memory package and a memory module including the memory package (U.S. Patent No. 12322436). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12322436
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile