The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2025

Filed:

Nov. 12, 2021
Applicant:

Mammen Thomas, Seattle, WA (US);

Inventor:

Mammen Thomas, Seattle, WA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 13/40 (2006.01); H04L 49/40 (2022.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G06F 13/4022 (2013.01); G06F 13/4221 (2013.01); H04L 49/40 (2013.01); G06F 2213/0026 (2013.01);
Abstract

PCI-Express (PCIE) is a hierarchical Bus or-I/O interconnect standard-used for interconnection between a root-complex of a PCIE enabled computing system and peripheral devices over the bus that may include hierarchically connected and controlled PCIE switches. The current application describes a PCIE based interconnect scheme for a plurality of PCIE enabled computing systems connected in a cluster using a network switch, having a plurality of inbound PCIE ports, The network switch is independently configured and controlled as a hub of a star interconnection topology for switching and data-transfer between its inbound PCIE ports. Connecting an outbound PCIE port, enabled for interconnection, on each of the plurality of the PCIE enabled computing systems of the cluster to one of the plurality of inbound PCIE ports on the network switch the star interconnection for communication and data-transfer between the PCIE enabled systems of the cluster through the network switch is enabled.


Find Patent Forward Citations

Thomas, Mammen. (2025). Pci express to pci express based low latency interconnect scheme for clustering systems (U.S. Patent No. 12321307). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12321307

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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