The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jul. 18, 2022
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Hyun Soo Shin, Icheon-si, KR;

Sung Lae Oh, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 1/00 (2025.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H10D 1/042 (2025.01); H10B 43/40 (2023.02); H10D 1/043 (2025.01); H10D 1/714 (2025.01); H10D 1/716 (2025.01); H10B 43/27 (2023.02);
Abstract

A semiconductor device includes a stack including a plurality of electrode layers which include a plurality of capacitor first electrode layers and a plurality of capacitor second electrode layers alternately stacked on a substrate and a plurality of dielectric layers which are disposed alternately with the plurality of electrode layers; a first conductive pillar passing through the stack and coupled to the plurality of capacitor first electrode layers; a second conductive pillar passing through the stack and coupled to the plurality of capacitor second electrode layers; and a plurality of insulation layer patterns insulating the first conductive pillar and the plurality of capacitor second electrode layers from each other and insulating the second conductive pillar and the plurality of capacitor first electrode layers from each other.


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