The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Aug. 16, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Shuangqiang Luo, Boise, ID (US);

Nancy M. Lomeli, Boise, ID (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 41/27 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/40 (2023.02); H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02);
Abstract

A microelectronic device comprises a stack structure, a stadium structure within the stack structure, a source tier underlying the stack structure, and a masking structure. The stack structure has tiers each comprising a conductive structure and an insulating structure. The stadium structure comprises a forward staircase structure, a reverse staircase structure, and a central region horizontally interposed between the forward staircase structure and the reverse staircase structure. The source tier comprises discrete conductive structures within horizontal boundaries of the central region of the stadium structure and horizontally separated from one another by dielectric material. The masking structure is confined within the horizontal boundaries of the central region of the stadium structure and is vertically interposed between the source tier and the stack structure. The masking structure comprises segments horizontally covering portions of the dielectric material horizontally interposed between the discrete conductive structures. Additional devices and electronic systems are also described.


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