The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jan. 26, 2023
Applicant:

Ciena Corporation, Hanover, MD (US);

Inventors:

Bhupendra Yadav, Ottawa, CA;

Prabhu Vaithilingam, Kanata, CA;

Gerald Smallegange, Stittsville, CA;

Alwyn Joy George, New Delhi, IN;

Assignee:

Ciena Corporation, Hanover, MD (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 45/00 (2022.01); H04L 45/121 (2022.01);
U.S. Cl.
CPC ...
H04L 45/34 (2013.01); H04L 45/121 (2013.01);
Abstract

Systems and methods include maintaining a network plane in Segment Routing (SR) Flexible Algorithm having a Flexible Algorithm Definition (FAD) based on latency; receiving a request for a service over a SR network where the service is sensitive to a specific latency; and determining a label stack including one or more Segment Identifiers (SID) for the service, with the one or more SIDs based on the network plane in SR Flexible Algorithm. This can be used for Private Line Emulation (PLE) services and Circuit Emulation (CEM) services over SR, ensuring latency while not requiring large label stacks.


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