The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Sep. 26, 2022
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Hsuan-Ting Ho, Hsinchu, TW;

Shih-Hsiung Huang, Hsinchu, TW;

Liang-Wei Huang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/12 (2006.01);
U.S. Cl.
CPC ...
H04B 1/123 (2013.01);
Abstract

A signal receiver and a slicer are capable of mitigating the static mismatch error of a far-end digital-to-analog converter. The slicer includes an adjustable slicing circuit and an error signal generating circuit. The adjustable slicing circuit determines which of (N+1) signal levels is corresponding to an input signal according to N slicer levels and thereby outputs an output signal, wherein the input signal is originated from the far-end digital-to-analog converter. The adjustable slicing circuit further adjusts at least some of the (N+1) signal levels according to an error signal and adjusts at least some of the N slicer levels, wherein the N is an integer greater than two. The error signal generating circuit is coupled to the adjustable slicing circuit and generates the error signal according to the input and output signals.


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