The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Aug. 10, 2022
Applicant:

Analog Devices, Inc., Wilmington, MA (US);

Inventor:

Cheng C. Wang, San Jose, CA (US);

Assignee:

Analog Devices, Inc., Wilmington, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/1776 (2020.01); G06F 7/544 (2006.01); H03K 19/17724 (2020.01);
U.S. Cl.
CPC ...
H03K 19/1776 (2013.01); H03K 19/17724 (2013.01);
Abstract

An integrated circuit comprising a plurality of MACs, connected to form a pipeline, to perform a plurality of multiply and accumulate operations, wherein each MAC includes: (A) a multiplier, coupled to memory to (i) receive the multiplier weight data, (ii) multiply first data and the multiplier weight data and (iii) output product data, (B) an accumulator, coupled to the multiplier of the MAC, to add second data and the first product data and output sum data, and (C) a load-store register, coupled to: (i) an output of the accumulator of the associated MAC and (ii) an input of the load-store register of an immediately successive MAC. Each load-store register may include two interconnected registers, and is configurable to, on the same clock cycle, (a) load the initialization data into the accumulator of the immediately successive MAC and (b) store the sum data from the associated MAC into the load-store register.


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