The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Dec. 17, 2020
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventors:

Takeya Okuno, Nara, JP;

Manabu Yanagihara, Osaka, JP;

Hiroki Akashi, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H02J 7/02 (2016.01); H02M 1/08 (2006.01); H02M 1/44 (2007.01); H02M 3/335 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33571 (2021.05); H02J 7/0042 (2013.01); H02J 7/02 (2013.01); H02M 1/08 (2013.01); H02M 1/44 (2013.01); H02M 3/33576 (2013.01); H02J 2207/20 (2020.01);
Abstract

EMI noise is reduced and a component mounting area is suppressed, and downsizing of a power supply device is achieved. Power supply device includes transistor block, gate drive circuit block, and driver block. First gate terminal and second gate terminal are disposed on the same side as gate drive circuit block when viewed from a center of transistor block. Two output terminals are disposed on the same side as transistor block when viewed from a center of gate drive circuit block. At least a part of first drain terminal is included in a region sandwiched between first source terminal and second source terminal. Second drain terminal is disposed at a position deviating from an extension region that extends the region sandwiched between the first source terminal and the second source terminal beyond second source terminal as viewed from first drain terminal.


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