The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Dec. 12, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Hyunjun Yoon, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1084 (2013.01); G06F 3/0679 (2013.01);
Abstract

A memory device includes a memory cell array having memory cells therein that are programed to a plurality of program states, and a page buffer circuit having a plurality of page buffers therein that are connected to a plurality of bit lines associated with the memory cell array. Each of the page buffers includes a sensing latch that is connected to a corresponding one of the plurality of bit lines, and is configured to control a precharge operation performed on a corresponding bit line. Control logic is provided to control a verification operation performed on the plurality of program states within the memory cells by controlling the page buffer circuit, a plurality of dump operations on the sensing latch, which are based on values of at least two bits stored in each of the page buffers, and a selective precharge of bit lines that are connected to memory cells to be programmed to a first program state to be verified, from among the plurality of program states.


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