Memory system, memory controller and method for operating memory system

Abstract

Embodiments of the disclosed technology relate to a memory system, a memory controller and a method for operating a memory system. According to the embodiments of the disclosed technology, a memory system may include a volatile memory accessed through a plurality of address fields, and divided into a plurality of subareas on the basis of a reference address field among the plurality of address fields; and a memory controller including a plurality of cores to which the plurality of subareas are allocated and which generate test signals corresponding to a test pattern. The memory controller may transmit the test signals generated in the plurality of cores, respectively, to the volatile memory.