The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Jun. 30, 2022
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Yadong Zhang, Beijing, CN;

Bo Wu, Beijing, CN;

Ting Li, Beijing, CN;

Biqi Li, Beijing, CN;

Jing Han, Beijing, CN;

Haohao Li, Beijing, CN;

Changyi Wang, Beijing, CN;

Zhengdong Zhang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1339 (2006.01); G02F 1/1333 (2006.01); G02F 1/1335 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13394 (2013.01); G02F 1/133357 (2021.01); G02F 1/133512 (2013.01); G02F 1/13398 (2021.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01);
Abstract

A liquid crystal light-control panel includes a first array substrate and a cover plate opposite to each other, and a plurality of support pillars disposed between the first array substrate and the cover plate. The first array substrate includes a first substrate and a plurality of transistors disposed on the first substrate. The cover plate includes a second substrate and a light-shielding layer, including a plurality of first light-shielding blocks in one-to-one correspondence with the plurality of support pillars and a plurality of second light-shielding blocks in one-to-one correspondence with the plurality of transistors, disposed on the second substrate. An orthographic projection of the support pillar onto the first substrate is within an orthographic projection of the corresponding first light-shielding block onto the first substrate. An orthographic projection of the transistor onto the first substrate is within an orthographic projection of the corresponding second light-shielding block onto the first substrate.


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