The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

May. 02, 2023
Applicant:

Murata Manufacturing Co., Ltd., Kyoto-fu, JP;

Inventors:

Tarou Higuchi, Nagaokakyo, JP;

Yoshihiro Imanishi, Nagaokakyo, JP;

Yasushi Saito, Nagaokakyo, JP;

Akio Igarashi, Nagaokakyo, JP;

Minehito Yoshida, Nagaokakyo, JP;

Hiroyuki Honda, Nagaokakyo, JP;

Masaki Inui, Nagaokakyo, JP;

Yuya Nagaoka, Nagaokakyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0218 (2013.01); H05K 1/181 (2013.01); H05K 2201/1003 (2013.01);
Abstract

A multilayer circuit board having a signal and power isolation circuit, which can suppress the capacitive coupling between a chip inductor and a ground layer below the chip inductor and also suppress the characteristic impedance change occurring in a mounting pad on a microstrip line. Portions of the inner-layer ground below both the mounting pad on the microstrip line and the chip inductors connected to the mounting pad are separately removed respectively as the signal transmission characteristic compensation removal portion, which is formed by removing a portion having a predetermined area and situated immediately below the mounting pad, and the inductor characteristic compensation removal portion, which is formed by removing a mounting-surface-below portion having a predetermined area and situated immediately below the chip inductors. The signal transmission characteristic compensation removal portion and the inductor characteristic compensation removal portion are electrically isolated from each other with the predetermined distance therebetween.


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