The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Nov. 30, 2020
Applicant:

Cryptography Research, Inc., San Jose, CA (US);

Inventors:

Michael Hutter, Vienna, AT;

Helena Handschuh, Palo Alto, CA (US);

Scott C. Best, Palo Alto, CA (US);

Assignee:

Cryptography Research, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/75 (2013.01); H04L 9/00 (2022.01); H04L 9/06 (2006.01); H04L 9/08 (2006.01);
U.S. Cl.
CPC ...
G06F 21/755 (2017.08); H04L 9/003 (2013.01); G06F 21/75 (2013.01); H04L 9/002 (2013.01); H04L 9/0662 (2013.01);
Abstract

Hardware masking may be used as a countermeasure to make power analysis attacks more difficult. Masking attempts to decouple the secret and/or processed values of a cryptographic algorithm from its intermediate values. One method of masking probabilistically splits each bit of a computation into multiple shares. Mask-share domains (i.e., the wires and gates that perform a computation on a share) are physically spaced to reduce coupling between mask-share domains. The mask-share domains may be connected to the same power supply network. The physical distance between mask-share domains along the power-supply network may be selected to reduce coupling between mask-share domains that may occur via the power supply network. The mask-share domains may each be connected to different on-chip power supply networks.


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