The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Oct. 25, 2021
Applicant:

Kongsberg Defence & Aerospace As, Kongsberg, NO;

Inventors:

John Aasen, Fjerdingby, NO;

Frode Borgersen, Fetsund, NO;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/44 (2013.01);
U.S. Cl.
CPC ...
G06F 21/44 (2013.01);
Abstract

A method and system for authenticating and enabling activation of a configuration used for controlling a product, where the configuration is implemented as safety critical logic functions in programmable logic blocks of a Field Programmable Gate Array, FPGA, having a volatile configuration-memory. The configuration is loaded into the volatile configuration-memory of the FPGA via an external interface input of the FPGA. The content of the configuration-memory of the FPGA is read via an interface of the FPGA. This is done immediately after completed loading of the configuration into the memory of the FPGA. A Cyclic Redundancy Check, CRC, checksum of the read content of the configuration-memory is computed in an CRC checksum generator, and a resulting generated CRC checksum value is compared with an externally stored valid CRC checksum value of the expected FPGA configuration. It is then checked if the generated CRC checksum value and the stored valid CRC checksum value match and the outputs of selected logic functions of the FPGA are enabled only if the generated CRC check value and the stored valid CRC checksum values match.


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