Deny list for a memory prefetcher circuit

Abstract

An apparatus includes a cache memory circuit, a prefetcher circuit, and a prefetch deny list circuit, including a plurality of entries, may be included. The cache memory circuit may be configured to store information retrieved from a lower-level memory. The prefetcher circuit may be configured to generate a prefetch request for a particular prefetch address. The prefetch deny list circuit may be configured to allocate, in response to an indication from the cache memory circuit that a previously prefetched address went unused, a given entry, of the plurality of entries, for the previously prefetched address. The prefetch deny list circuit may be further configured to determine whether a particular address for a particular prefetch request corresponds to an active one of the plurality of entries. In response to a determination that a particular active entry corresponds to the particular address, prefetch deny list circuit may deny the particular prefetch request.