The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2025

Filed:

Dec. 30, 2021
Applicant:

Shenzhen Institutes of Advanced Technology, Shenzhen, CN;

Inventors:

Hui Yang, Shenzhen, CN;

Rui Hao, Shenzhen, CN;

Yi Zhang, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B01L 3/00 (2006.01); A61K 45/06 (2006.01); G03F 7/038 (2006.01); G03F 7/039 (2006.01); G03F 7/20 (2006.01); G03F 7/32 (2006.01); G03F 7/38 (2006.01); G03F 7/40 (2006.01); B82Y 40/00 (2011.01);
U.S. Cl.
CPC ...
B01L 3/502753 (2013.01); A61K 45/06 (2013.01); B01L 3/502707 (2013.01); G03F 7/0382 (2013.01); G03F 7/0392 (2013.01); G03F 7/20 (2013.01); G03F 7/32 (2013.01); G03F 7/38 (2013.01); G03F 7/40 (2013.01); B01L 2200/12 (2013.01); B01L 2300/0819 (2013.01); B01L 2300/0896 (2013.01); B82Y 40/00 (2013.01);
Abstract

Provided is a micro- and nano-fluidic chip, including at least one nanochannel array layer and at least one microchannel array layer that are alternately stacked. The at least one nanochannel array layer includes nanochannels, the at least one microchannel array layer includes input units and/or output units. The input unit includes inlet microchannel arrays and inlets, and the output unit includes outlet microchannel arrays and outlets. The inlet microchannel array includes inlet microchannels, the outlet microchannel array includes outlet microchannels, and the inlet microchannels and the outlet microchannels are connected through the nanochannels.


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