The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Feb. 15, 2024
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Jin Woo Lee, Suwon-si, KR;

Jintaek Kim, Yongin-si, KR;

Yeonhong Kim, Hwaseong-si, KR;

Pilsuk Lee, Seoul, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 59/124 (2023.01); H10K 77/10 (2023.01);
U.S. Cl.
CPC ...
H10K 59/1216 (2023.02); H10K 59/124 (2023.02); H10K 77/111 (2023.02);
Abstract

A display device includes: a substrate; a buffer layer on the substrate; a first active pattern and a second active pattern on the buffer layer and spaced apart from each other; a first gate insulation layer on the first active pattern and the second active pattern; a first gate electrode and a second gate electrode on the first gate insulation layer, the first gate electrode and the second gate electrode respectively overlapping the first active pattern and the second active pattern; a second gate insulation layer on the first gate electrode and the second gate electrode; and a capacitor electrode on the second gate insulation layer, the capacitor electrode overlapping the first gate electrode, wherein a permittivity of the first gate insulation layer is greater than a permittivity of the buffer layer.


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