Memory device using semiconductor element

Abstract

A groove is formed in a first semiconductor layer, a sidewall of the groove is coated with a first insulating film, a first impurity layerand a second impurity layerthereon are disposed in the groove, a second semiconductor layeris disposed on the second impurity layer, a first semiconductor is disposed at the other part, an nlayerand an nlayerare positioned at respective ends of the second semiconductor layerand connected to a source line SL and a bit line BL, respectively, a first gate insulating layeris formed on the second semiconductor layer, and a first gate conductor layeris connected to a word line WL. Voltage applied to the source line SL, a plate line PL connected to the first semiconductor layer, the word line WL, and the bit line BL is controlled to perform data holding operation of holding, near the gate insulating layer, holes generated by an impact ionization phenomenon in a channel regionof the second semiconductor layer or by gate-induced drain leakage current, and data erase operation of removing the holes from the channel region