The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Feb. 10, 2023
Applicant:

Omnivision Technologies, Inc., Santa Clara, CA (US);

Inventors:

Shan Chen, Sunnyvale, CA (US);

Hiroaki Ebihara, San Jose, CA (US);

Rui Wang, San Jose, CA (US);

Zhenfu Tian, San Jose, CA (US);

Assignee:

OMNIVISION TECHNOLOGIES, INC., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/78 (2023.01); H04N 25/77 (2023.01);
U.S. Cl.
CPC ...
H04N 25/78 (2023.01); H04N 25/77 (2023.01);
Abstract

A local ramp buffer includes a deep N− well layer disposed in a P− substrate beneath a surface of the P− substrate, a P− well disposed between the surface of the P− substrate and the deep N− well layer, and an N− well structure disposed in the P− substrate and coupled to the deep N− well layer. The N− well structure is disposed between the surface of the P− substrate and the deep N− well layer. The P− well is disposed inside an opening in the N− well structure. The N− well structure and the deep N− well layer are configured to isolate the P− well within the opening. A source follower transistor is disposed in the P− well. The source follower transistor includes a gate terminal coupled to the N− well structure and a ramp generator.


Find Patent Forward Citations

Loading…