The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Aug. 07, 2023
Applicants:

Vishal Sarin, Saratoga, CA (US);

Biprangshu Saha, Bangalore, IN;

Sankha Saha, Santa Clara, CA (US);

Vikram Kowshik, Cupertino, CA (US);

Sang T. Nguyen, Union City, CA (US);

Siraj Fulum Mossa, San Jose, CA (US);

Inventors:

Vishal Sarin, Saratoga, CA (US);

Biprangshu Saha, Bangalore, IN;

Sankha Saha, Santa Clara, CA (US);

Vikram Kowshik, Cupertino, CA (US);

Sang T. Nguyen, Union City, CA (US);

Siraj Fulum Mossa, San Jose, CA (US);

Assignee:

SAGENCE AI CORPORATION, SANTA CLARA, US;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); G06F 7/544 (2006.01); H03K 3/037 (2006.01); H03M 1/00 (2006.01); H03M 1/48 (2006.01);
U.S. Cl.
CPC ...
H03M 1/12 (2013.01); G06F 7/5443 (2013.01); H03K 3/0372 (2013.01); H03M 1/00 (2013.01); H03M 1/48 (2013.01);
Abstract

In one aspect, an analog to digital converter (ADC) for a multiply-accumulator (MAC) system comprising: an ADC control that receives a VREF and generates a plurality of timing signals to an ADC, and wherein the plurality of timing signals comprises an Ssignal, an Ssignal, an Ssignal, an ECO signal, a CLOCK signal, and a COUNTER<N:0> signal; the ADC that comprises: a pre-charge system comprising a sense capacitor that stores an integrated charge IMAC over a time T and develops voltage VMAC, and wherein the Ssignal defines the pre-charge phase of the sense capacitor.


Find Patent Forward Citations

Quick Actions:

Sarin, Vishal. (2025). Methods and systems of utilizing analog to digital converter (adc) for multiply-accumulator (mac) (U.S. Patent No. 12301248). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12301248

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