The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Sep. 21, 2023
Applicant:

Delta Electronics, Inc., Taoyuan, TW;

Inventors:

Yung-Sheng Yeh, Taoyuan, TW;

Chih-Wei Liang, Taoyuan, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 1/00 (2006.01); H02M 1/42 (2007.01); H03K 17/041 (2006.01); H03K 17/06 (2006.01); H03K 17/30 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4233 (2013.01); H02M 1/0085 (2021.05); H02M 1/081 (2013.01); H03K 17/04106 (2013.01); H03K 17/063 (2013.01); H03K 17/302 (2013.01);
Abstract

An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors.


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