The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Feb. 17, 2023
Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventor:

Tomoya Inden, Yokkaichi, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 23/528 (2006.01); H01L 23/535 (2006.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H01L 27/0922 (2013.01); H01L 21/823857 (2013.01); H01L 23/528 (2013.01); H01L 23/535 (2013.01); H10B 43/27 (2023.02); H10B 43/40 (2023.02);
Abstract

According to one embodiment, a semiconductor device includes: a first well region of N-type and a second well region of P-type; a PMOS transistor provided in the first well region; and an NMOS transistor provided in the second well region. The PMOS transistor includes a first gate insulating layer and a first gate electrode. The NMOS transistor includes a second gate insulating layer and a second gate electrode. The first gate electrode includes a first semiconductor layer of P-type, a first insulating layer, and a first conductive layer. The second gate electrode includes a second semiconductor layer of N-type, a second insulating layer, and a second conductive layer. A film thickness of the first insulating layer is thicker than a film thickness of the second insulating layer.


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