The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Feb. 22, 2022
Applicants:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Toshiba Electronic Devices & Storage Corporation, Tokyo, JP;

Inventors:

Jia Liu, Yokohama, JP;

Toshihiro Tsujimura, Ota, JP;

Masahiko Hori, Yokohama, JP;

Tatsuo Tonedachi, Yamato, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/66 (2006.01); H01L 31/12 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 25/167 (2013.01); H01L 23/5386 (2013.01); H01L 23/66 (2013.01); H01L 24/48 (2013.01); H01L 31/12 (2013.01); H01L 23/3121 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/85 (2013.01); H01L 2924/15153 (2013.01);
Abstract

A semiconductor package includes a PDA chip, a MOS chip, and a wiring plate including a first principal surface and a second principal surface, the first principal surface being provided with a first rigid plate that is non-conductive and a second rigid plate that is conductive, the PDA chip being fixed to the first rigid plate by using a non-conductive bonding agent, a lower surface terminal of the MOS chip being soldered to the second rigid plate, the second principal surface being provided with an input terminal and an output terminal, the input terminal being electrically connected to the PDA chip, the output terminal being electrically connected to the second rigid plate.


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