The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Dec. 13, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Keisuke Nakatsuka, Kobe, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); G11C 16/16 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); G11C 16/16 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01);
Abstract

According to one embodiment, in a semiconductor memory device, the first chip has plural memory cells provided at plural intersection positions where the plural first conductive layers and the plural first semiconductor films intersect each other. The second chip has plural memory cells provided at plural intersection positions where the plural second conductive layers and the plural second semiconductor films intersect each other. A first connection configuration and a second connection configuration are insulated from each other. The first connection configuration reaches the third chip from a first conductive layer that a tip of the first semiconductor film reaches among the plural first conductive layers. The second connection configuration reaches the third chip from a second conductive layer that a tip of the second semiconductor film reaches among the plural second conductive layers.


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