The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Jul. 05, 2022
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zhenhua Zhang, Beijing, CN;

Dongfang Yang, Beijing, CN;

Xilei Cao, Beijing, CN;

Xueguang Hao, Beijing, CN;

Lang Liu, Beijing, CN;

Jingyi Feng, Beijing, CN;

Changlong Yuan, Beijing, CN;

Xiaoxin Li, Beijing, CN;

Li Zhu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); G09G 3/20 (2006.01); H10K 59/121 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G09G 3/2007 (2013.01); H10K 59/1213 (2023.02); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/0257 (2013.01); G09G 2330/021 (2013.01);
Abstract

A pixel circuit and a driving method therefor and a display panel are provided. The pixel circuit includes a driving circuit, a data writing circuit, a storage circuit, and a first reset circuit; the driving circuit includes a control terminal, a first terminal, and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; the data write circuit is configured to write a data signal into the control terminal of the driving circuit; the storage circuit is configured to store the data signal; the first reset circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit; the driving circuit and the data write circuit each include an N-type thin film transistor; and the first reset circuit includes an N-type oxide thin film transistor.


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