The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2025

Filed:

Aug. 21, 2023
Applicant:

Exo Imaging, Inc., Santa Clara, CA (US);

Inventors:

Janusz Bryzek, Oakland, CA (US);

Sandeep Akkaraju, Wellesley, MA (US);

Yusuf Haque, Woodside, CA (US);

Joe Adam, Truckee, CA (US);

Assignee:

Exo Imaging, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B06B 1/06 (2006.01); A61B 8/00 (2006.01); B06B 1/02 (2006.01); B81B 7/00 (2006.01); G01S 15/89 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
A61B 8/4494 (2013.01); A61B 8/4488 (2013.01); B06B 1/0215 (2013.01); B06B 1/0622 (2013.01); B06B 1/0666 (2013.01); B06B 1/067 (2013.01); B06B 1/0681 (2013.01); B81B 7/0058 (2013.01); G01S 15/8938 (2013.01); G01S 15/8965 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); B06B 2201/76 (2013.01); B81B 2207/012 (2013.01); B81B 2207/053 (2013.01); B81B 2207/098 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73207 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/1461 (2013.01);
Abstract

Described are transducer assemblies and imaging devices comprising: a microelectromechanical systems (MEMS) die including a plurality of piezoelectric elements; a complementary metal-oxide-semiconductor (CMOS) die electrically coupled to the MEMS die by a first plurality of bumps and including at least one circuit for controlling the plurality of piezoelectric elements; and a package secured to the CMOS die by an adhesive layer and electrically connected to the CMOS die.


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