The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2025

Filed:

Jan. 25, 2024
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventor:

Atsushi Umezaki, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2005.12); G09G 3/36 (2005.12); G11C 19/28 (2005.12); H01L 21/477 (2005.12); H01L 27/12 (2005.12); H01L 29/786 (2005.12);
U.S. Cl.
CPC ...
H01L 29/7869 (2012.12); G09G 3/20 (2012.12); G09G 3/3648 (2012.12); G11C 19/28 (2012.12); H01L 21/477 (2012.12); H01L 27/1255 (2012.12); H01L 27/127 (2012.12); G09G 2300/04 (2012.12); G09G 2310/0275 (2012.12);
Abstract

One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line; a preceding stage signal is supplied to the second signal line; a second clock signal is supplied to the third signal line; an output signal is output from the fourth signal line. Duty ratios of the first clock signal and the second clock signal are different from each other. A period during which the second clock signal is changed from an L-level signal to an H-level signal after the first clock signal is changed from an H-level signal to an L-level signal is longer than a period during which the preceding stage signal is changed from an L-level signal to an H-level signal.


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